Flash memory stores data in arrays of memory elements, or cells, formed from floating-gate transistors. NAND flash memory devices return previously stored data by reading a set of bits from individual cells in an array. The time required to write data to a cell is typically much longer than the time required to read data from a cell. As sizes for memory elements continue to decrease, write times continue to increase at a faster rate than read times.
Program operations typically occur in groups or pages of multiple memory cells. Read operations may occur in pages of memory cells or in smaller sets of memory cells. Many flash memory devices are designed to keep read times as low as possible to allow very fast access to the data stored at the memory cells. A memory device may include one or more chips, and a chip may include one or more memory arrays of memory cells. However, while a program operation is being performed for a given cell, other access to the chip on which the cell is located is blocked, including reading data stored at other cells on the same chip. As a result, an application requesting access to data stored at a given cell involved in a read request may not receive the data for a significantly long period of time if a program operation is being performed at the chip on which the given cell is located than if a read operation associated with the read request is performed immediately upon receipt of the read access request.
Throughout the description, similar reference numbers may be used to identify similar elements.